Original Post

HorvatM is an inexplicable font of information, and has shed some light on many tricky subjects in the past. Today is no different. The subject was tricky enough that neither of us was sure what the right answer was. (-:

The issue is the SETF instruction, which checks for the same conditions as the conditional branch instruction Bcond, but instead of branching, simply stores a 1 in the given register if the condition passes, or a 0 if it fails.

What’s so mysterious about that? Well, how do you express that instruction in assembly? The NEC V810 manual, Renesas V850 manual, NEC CA830/CA850 manual and the GNU assembler all indicate you write it like this:

SETF NZ, r13

But then there was that little V810 Programming thing, presented by NEC, where you can plainly see on slide 24 where it’s written in this form:


So what gives? Well, searching found the IAR Systems V850 assembler manual, which explicitly spells out on page 18 what’s going on:


Instructions with a condition code as operand

Assembler instructions with a condition code as operand, for example SETF, have this format in the Renesas documentation:

SETF  cccc,reg

In the IAR assembler, the condition code is merged with the mnemonic:


instead of


Sure, it says “syntax deviations” up there, but then why did it appear that way in an official NEC presentation? Further muddying matters is the fact that IAR is an official partner of Renesas, meaning their notation at the very least is officially-ordained.

HorvatM and I came to the same conclusion (for a change (-: ) on the matter: both forms are officially sanctioned, so both forms are valid.

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Additionally, two other historically important assemblers diverge on the matter.

ISAS, Intelligent Systems’ assembler for Virtual Boy development, which was used for commercial games, only recognizes the form “SETF 10, r1”.

FXAS, Hudson’s assembler for PC-FX development, only recognizes “SETFNZ r1”.


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